In low-power, wireless receiver design, a major challenge is presented by the presence of strong (i.e., relatively high amplitude) blockers or interferers operating at frequencies similar to that of a desired signal. For example, a global positioning system (GPS) receiver operating at approximately 1575 MHz may receive significant interference from a CDMA wireless communication system operating around 1700 MHz. These blockers can impact the design of several significant aspects of a receiver, e.g., linearity, local oscillator (LO) phase noise, mismatch tolerance, power consumption, etc. For zero-intermediate-frequency (IF) and low-IF transceiver designs, strong interference signals close in frequency to the desired signal can mix with the noise sidebands of a LO to produce unwanted noise products that can degrade the receiver's performance, a phenomenon known as reciprocal mixing.
The portion of a wireless receiver used for conversion of received radio frequency (RF) signals to the appropriate IF signals is referred to as an RF front-end. RF front-ends typically include low noise amplifiers (LNAs), mixers and often an additional controllable gain or transconductance stage.
FIG. 1 illustrates an example conventional RF front-end circuit. As shown, RF front-end circuit 10 includes an LNA 12, a transconductance (gm) stage 14, and LO stage 16. RF front-end circuit 10 receives RF signals at LNA 12 from an external matching circuit 5, the external matching circuit being formed of various capacitors and inductors to provide some rejection of unwanted out-of-band RF signals. LNA 12 provides relatively low-noise amplification of the received RF signals and outputs amplified quadrature signals I and Q to gm stage 14. Gm stage 14 and LO stage 16 may include multiple transconductance devices and multiple mixer devices, respectively, for manipulating the quadrature signals I and Q to provide the appropriate IF signals.
Strong blockers and interferers are typically rejected in analog baseband circuitry of a receiver after downconversion. However, due to their proximity in frequency spectrum to the band of interest, there is usually no significant attenuation at RF frequencies. Therefore, although it is feasible to provide selectivity in the analog baseband circuitry and relax linearity and dynamic range requirements there, RF front-end linearity requirements and LO phase noise requirements still remain stringent.
One method of attenuating strong blockers in an RF front-end is to use an inductor-capacitor (LC) trap tuned to a single blocker frequency at the input or output of an LNA. This technique can mitigate the design challenges presented by a relatively high power blocker signal, either including or excluding the LNA depending on where the LC trap is placed. However, if used at the input of the LNA, the trap requires additional matching components and can significantly degrade the noise figure of the circuit, which is a conventional measure of degradation of the signal-to-noise-ratio (SNR) caused by components in the RF signal chain. To prevent noise figure degradation, the LC trap can be placed on-chip at the output of the LNA, but this makes it difficult to achieve a high quality factor (Q-factor, or simply ‘Q’) in the trap and obtain significant attenuation at nearby blocker frequencies. The Q-factor provides a comparison of the frequency at which a system oscillates to the rate at which it dissipates energy. A higher Q therefore indicates a lower rate of energy dissipation relative to the oscillation frequency, so the oscillations die out more slowly, making a high-Q desirable for narrowband applications such as the LC trap described above. However, even if high-Q on-chip inductors are feasible, they are usually prohibitively large.
To achieve high-Q on-chip inductance without using a large die area, gyrator-based active inductor circuits are often used. These gyrator circuits are used to simulate an inductive element in an integrated circuit (IC) using active devices which typically require less die space than actual inductors. There are several well-known examples of modified gyrators which can be used to somewhat control the Q-factor of a circuit, thereby achieving an arbitrarily sharp attenuation profile at a given blocker frequency. However, the noise response of such active circuits is usually more broadband, especially the noise response generated due to inverse frequency noise upconversion. This additional noise leads to significant degradation of the noise figure in the desired signal band.
Another approach to providing selectivity in RF front-ends takes advantage of tank circuits (or load tanks) sometimes used in differential LNAs.
FIG. 2 illustrates a conventional differential LNA having a load tank. As shown, LNA 200 includes an input (or transconductance) stage 210, a current buffer stage 220, a load tank 230, and a tail current source 260. The input stage 210 includes first and second transconductance devices 212 and 214 (e.g., NMOS transistors). Current buffer stage 220 includes a pair of cascode transistors 222 and 224 (e.g., NMOS transistors). Load tank 230 is formed of a tank inductor 232 and tank capacitor 234. Load tank 230 also includes a resistance Rtank 236, which may be a physical resistor or may simply represent the real impedance of the other elements in load tank 230. In addition to the load tank resistance Rtank 236, the output resistance of LNA 200 is illustrated as Rout-LNA 270, and the input resistance of the next stage fed by LNA 200 (e.g., transconductance stage 14 of FIG. 1) is illustrated as Rin-next 240 in FIG. 2.
Input stage 210 is configured to receive RF signals from external matching circuit 5, as described above with reference to FIG. 1. Tail current source stage 260 is configured to provide current to input stage 210, and may be implemented in a variety of ways as is well-known in the art. LNA 200 is DC biased by a biasing voltage VDD, and cascode devices 222 and 224 are biased by a cascode biasing voltage Vcasc. As shown, an output signal is generated at an output stage 280 by providing a positive output voltage Vout+ at an upper terminal (i.e., load tank side) of cascode device 222, and providing a negative output voltage Vout− at a corresponding upper terminal of the other cascode device 224. Elements or representations of elements coupled in parallel with output stage 280 (i.e., across the positive and negative outputs Vout+ and Vout− of LNA 200) are considered part of the ‘output network’ of LNA 200.
Load tank 230 enables LNA 200 to provide a tuned frequency response, thereby rejecting to a certain degree out-of-band signals. However, the amount of selectivity achieved with this approach is typically limited by the finite Q of the elements at the output network of LNA 200. Specifically, the Q-factor of LNA 200 is dependent on the equivalent real part impedance Req-LNA of the output network, where Req-LNA can be determined as follows:Req-LNA=Rtank∥Rout-LNA∥Rin-next.  (1)
Thus, in theory, a high-Q can be achieved by keeping the equivalent resistance Req-LNA high. However, in typical process technologies, even with the use of high-Q capacitors and inductors with a relatively low load tank resistance Rtank 236, it is difficult to get an equivalent Q of 8 or more from such a network, and out-of-band blocker rejection is therefore limited to only a few decibels (dBs).